Design Validation Roadshow



October 15th, Beaverton, OR - October 16th, 2014, Bellevue, WA

We are conducting lunchtime design validation seminars in Beaverton on Wednesday, October 15th, and Bellevue on Thursday, October 16th, both from 11:30 to 2 PM - lunch will be provided. We will cover 3 key topics that are critical to producing reliable, working hardware:

1) High-Speed Design Techniques Using Altium Designer & In-Circuit Design for Design Validation
- How to mitigate noise through proper layer stack up
- Validate that your PCB stack-up & targeted materials are appropriate for hitting the trace impedance targets before completing the routing and sending the design to the fabricator for assessment
- Instantly analyze the Voltage Regulator Module, PCB Substrate - include plane resonance, bulk bypass, and decoupling capacitors simultaneously to solve parameters for the desired effective impedance of the Power Distribution Network
- Quit guessing at bypass and decoupling capacitor value and placement
- Make efficient use of Altium Designer's robust design rule checking capability for high-speed design

2) Ensuring That Your Electrically Robust Design Will Be Optimally Manufacturable Using DFM Validation
Though the design rule checkers in a PCB layout tool assist with manufacturing requirements, the design will eventually be translated into the ODB++ or Gerber format. Like any translation, some limitations do not render a perfect copy. Also, PCB design rules are focused on copper connectivity of the netlist, not necessarily manufacturing limitations. We will show you how you can analyze your PCB design to optimize your design's manufacturability before sending it to the contract manufacturer. This analysis will help you reduce yield loss, increase your product's life in the field, reduce cost, reduce manufacturing time, and ultimately, de-risk your product's production and deployment.

3) PCB Design Best Practices for Reliable Manufacturing
Jim Pierce, Application Engineering Manager of Axiom Electronics, presents a standardized process for reducing the risk associated with product design and manufacturability. This process uses standardized methods to reduce variables and measure results throughout the manufacturing process to decrease cost and improve quality and reliability. Jim has three decades of experience as a PCB designer. He has many years of experience in the DFM arena, having worked for several years at Axiom Electronics and DFW Test before that.





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